A protecting circuit for reducing leakage currents comprises a first PMOS transistor (P-channel Metal-Oxide-Semiconductor Field-Effect Transistor), a second PMOS transistor, a first NMOS transistor (N-channel Metal-Oxide-Semiconductor Field-Effect Transistor), and a second NMOS transistor. The first PMOS transistor is coupled between a first voltage node and a node, and comprises a first gate coupled an input node. The second PMOS transistor is coupled between the node and an output node. The first NMOS transistor is coupled between the output node and a ground node, and comprises a third gate coupled to the input node. The second NMOS transistor is coupled between the input node and a second gate of the second PMOS transistor, and comprises a fourth gate coupled to a second voltage node.