发明授权
- 专利标题: Systems and methods for instruction sequence compounding in a virtual machine environment
- 专利标题(中): 虚拟机环境中指令序列复合的系统和方法
-
申请号: US10882891申请日: 2004-06-30
-
公开(公告)号: US08504703B2公开(公告)日: 2013-08-06
- 发明人: Rene Antonio Vega , Eric P. Traut , Mike Neil
- 申请人: Rene Antonio Vega , Eric P. Traut , Mike Neil
- 申请人地址: US WA Redmond
- 专利权人: Microsoft Corporation
- 当前专利权人: Microsoft Corporation
- 当前专利权人地址: US WA Redmond
- 代理机构: Woodcock Washburn LLP
- 主分类号: G06F15/16
- IPC分类号: G06F15/16 ; G06F9/455
摘要:
The present invention is a system for and method of providing instruction sequence compounding by (1) the virtual machine monitor's (VMM) looking ahead when an initial trap (exception) event occurs and recognizing traps within successive nearby instructions, combining and virtually executing the effects of multiple instructions while remaining inside the VMM's trap handler, and thereby minimizing the number of individual traps that would otherwise occur at each instruction and/or (2) the VMM's looking ahead when an initial context switch event occurs and recognizing context switches within successive nearby instructions, virtually combining the effects of multiple instructions and handing off this combined instruction to the host operating system, and thereby minimizing the number of individual context switches that would otherwise occur at each instruction. As a result, the number of processor cycles is reduced for exception handling and context switching in a virtual machine environment.