发明授权
US08508612B2 Image signal processor line buffer configuration for processing ram image data
有权
用于处理原始图像数据的图像信号处理器线缓冲器配置
- 专利标题: Image signal processor line buffer configuration for processing ram image data
- 专利标题(中): 用于处理原始图像数据的图像信号处理器线缓冲器配置
-
申请号: US12895396申请日: 2010-09-30
-
公开(公告)号: US08508612B2公开(公告)日: 2013-08-13
- 发明人: Guy Côté , Jeffrey E. Frederiksen , Joseph P. Bratt
- 申请人: Guy Côté , Jeffrey E. Frederiksen , Joseph P. Bratt
- 申请人地址: US CA Cupertino
- 专利权人: Apple Inc.
- 当前专利权人: Apple Inc.
- 当前专利权人地址: US CA Cupertino
- 代理机构: Fletcher Yoder PC
- 主分类号: H04N5/228
- IPC分类号: H04N5/228
摘要:
The present disclosure provides techniques relates to the implementation of a raw pixel processing unit using a set of line buffers. In one embodiment, the set of line buffers may include a first subset and second subset. Various logical units of the raw pixel processing unit may be implemented using the first and second subsets of line buffers in a shared manner. For instance, in one embodiment, defective pixel correction and detection logic may be implemented using the first subset of line buffers. The second subset of line buffers may be used to implement lens shading correction logic, gain, offset, and clamping logic, and demosaicing logic. Further, noise reduction may also be implemented using at least a portion of each of the first and second subsets of line buffers.
公开/授权文献
信息查询