Invention Grant
- Patent Title: Semiconductor device and method of detecting abnormality on semiconductor device
- Patent Title (中): 半导体装置及其检测方法
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Application No.: US13020518Application Date: 2011-02-03
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Publication No.: US08509006B2Publication Date: 2013-08-13
- Inventor: Junichi Yamada
- Applicant: Junichi Yamada
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2010-025966 20100208
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A semiconductor device includes: a plurality of word lines; a word line driver; a first detection circuit; and a control circuit. The plurality of word lines is connected to gates of a plurality of memory cell transistors, respectively. The word line driver supplies one of a selection voltage and a non-selection voltage to each of the plurality of word lines. The first detection circuit detects a first current flowing into the word line driver through a wiring supplying the selection voltage when the selection voltage is supplied to one of the plurality of word lines through the word line driver. The control circuit detects abnormality of the plurality of word lines and the word line driver based on the first current.
Public/Granted literature
- US08462563B2 Semiconductor device and method of detecting abnormality on semiconductor device Public/Granted day:2013-06-11
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