发明授权
US08509025B2 Memory array circuit incorporating multiple array block selection and related method 有权
包含多个阵列块选择和相关方法的存储阵列电路

Memory array circuit incorporating multiple array block selection and related method
摘要:
Circuits and methods are described for decoding exemplary memory arrays of programmable and, in some embodiments, re-writable passive element memory cells, which are particularly useful for extremely dense three-dimensional memory arrays having more than one memory plane. In addition, circuits and methods are described for selecting one or more array blocks of such a memory array, for selecting one or more word lines and bit lines within selected array blocks, for conveying data information to and from selected memory cells within selected array blocks, and for conveying unselected bias conditions to unselected array blocks.
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