Invention Grant
- Patent Title: Architecture and system for coordinated network-wide redundancy elimination
- Patent Title (中): 协调网络冗余消除的架构和系统
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Application No.: US12492749Application Date: 2009-06-26
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Publication No.: US08509237B2Publication Date: 2013-08-13
- Inventor: Srinivasa Aditya Akella , Ashok Anand , Vyas Sekar
- Applicant: Srinivasa Aditya Akella , Ashok Anand , Vyas Sekar
- Applicant Address: US WI Madison
- Assignee: Wisconsin Alumni Research Foundation
- Current Assignee: Wisconsin Alumni Research Foundation
- Current Assignee Address: US WI Madison
- Agency: Boyle Fredrickson S.C.
- Main IPC: H04L12/28
- IPC: H04L12/28 ; H04L12/56

Abstract:
A network employing redundancy-aware hardware may actively allocate decompression tasks among different devices along a single path to improve data throughput. The allocation can be performed by a hash or similar process operating on a header of the packets to distribute caching according to predefined ranges of hash values without significant additional communication overhead. Decompression of packets may be similarly distributed by marking shim values to match the earlier caching of antecedent packets. Nodes may use coordinated cache sizes and organizations to eliminate the need for separate cache protocol communications.
Public/Granted literature
- US20100329256A1 ARCHITECTURE AND SYSTEM FOR COORDINATED NETWORK-WIDE REDUNDANCY ELIMINATION Public/Granted day:2010-12-30
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