发明授权
- 专利标题: Computing device and method for checking via stub
- 专利标题(中): 用于通过存根检查的计算设备和方法
-
申请号: US13327771申请日: 2011-12-16
-
公开(公告)号: US08510705B2公开(公告)日: 2013-08-13
- 发明人: Jia-Lu Ye , Chia-Nan Pai , Shou-Kuo Hsu
- 申请人: Jia-Lu Ye , Chia-Nan Pai , Shou-Kuo Hsu
- 申请人地址: CN Shenzhen TW New Taipei
- 专利权人: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.,Hon Hai Precision Industry Co., Ltd.
- 当前专利权人: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.,Hon Hai Precision Industry Co., Ltd.
- 当前专利权人地址: CN Shenzhen TW New Taipei
- 代理机构: Altis Law Group, Inc.
- 优先权: CN201110312725 20111014
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A computer-based method and a computing device for checking stub lengths of via stubs of a printed circuit board (PCB) layout are provided. The computing device displays a check interface, selects signal transmission line from a currently run PCB layout through the check interface, receives a reference stub length input through the check interface, and determines the actual stub length of each via stub of each via each selected signal transmission line connected to. The computing device further determines that a design of one via stub satisfies the design standards, if the actual stub length of the one stub via is less than or equal to the reference length, and determines that a design of one via stub does not satisfy the design standards if the actual stub length of the one via stub is greater than the reference stub length.
公开/授权文献
- US20130097576A1 COMPUTING DEVICE AND METHOD FOR CHECKING VIA STUB 公开/授权日:2013-04-18
信息查询