An abnormality detection circuit monitors the sink current Irnf of a H-bridge circuit and determines the presence of an abnormal state if the sink current is not detected for a predetermined time. The abnormality detection circuit includes a clock pulse generator, a counter and a NMOS transistor. The abnormality detection circuit includes a clock pulse generator arranged to generate a clock pulse of a predetermined frequency, and a counter arranged so that a count value is incremented every time the clock pulse is provided to the counter and arranged so that the count value is reset when the sink current is detected. The counter generates a first abnormality detection signal that changes from a normal logic level to an abnormal logic level when the count value reaches a predetermined value without being reset.