Invention Grant
- Patent Title: 8-transistor SRAM cell design with outer pass-gate diodes
- Patent Title (中): 具有外部通过栅极二极管的8晶体管SRAM单元设计
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Application No.: US13345636Application Date: 2012-01-06
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Publication No.: US08526228B2Publication Date: 2013-09-03
- Inventor: Leland Chang , Isaac Lauer , Chung-Hsun Lin , Jeffrey W. Sleight
- Applicant: Leland Chang , Isaac Lauer , Chung-Hsun Lin , Jeffrey W. Sleight
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Law Offices of Ira D. Blecker, P.C.
- Main IPC: G11C11/36
- IPC: G11C11/36 ; G11C16/24

Abstract:
An 8-transistor SRAM cell which includes two pull-up transistors and two pull-down transistors in cross-coupled inverter configuration for storing a single data bit; first and second pass-gate transistors having a gate terminal coupled to a write word line and a source or drain of each of the pass-gate transistors coupled to a write bit line through a series outer diode between the pass-gate and the write bit line oriented to block charge transfer from the write bit line into the cell; and first and second read transistors coupled to the two pull-up and two pull-down transistors, one of the read transistors having a gate terminal coupled to a read word line and a source or a drain coupled to a read bit line. The 8-transistor SRAM cell is adapted to prevent the value of the bit stored in the cell from changing state.
Public/Granted literature
- US20130176771A1 8-TRANSISTOR SRAM CELL DESIGN WITH OUTER PASS-GATE DIODES Public/Granted day:2013-07-11
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