Invention Grant
- Patent Title: Double data rate output circuit
- Patent Title (中): 双数据速率输出电路
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Application No.: US13624487Application Date: 2012-09-21
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Publication No.: US08533522B2Publication Date: 2013-09-10
- Inventor: Alan Roth , Oswald Becca , Pedro Ovalle
- Applicant: MOSAID Technologies Incorporated
- Applicant Address: CA Ottawa, Ontario
- Assignee: MOSAID Technologies Incorporated
- Current Assignee: MOSAID Technologies Incorporated
- Current Assignee Address: CA Ottawa, Ontario
- Agent Conley Rose, P.C.; J. Robert Brown, Jr.
- Main IPC: G06F1/12
- IPC: G06F1/12

Abstract:
A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second transparent latch receives data from the first transparent latch and outputs data dependent on a delayed output clock which is the output clock delayed by an insertion delay. An output latch receives data from the second transparent latch and synchronizes data to the output clock.
Public/Granted literature
- US20130024717A1 Double Data Rate Output Circuit and Method Public/Granted day:2013-01-24
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