发明授权
- 专利标题: Method for fabricating chip package with die and substrate
- 专利标题(中): 用芯片和基板制造芯片封装的方法
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申请号: US10454972申请日: 2003-06-04
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公开(公告)号: US08535976B2公开(公告)日: 2013-09-17
- 发明人: Jin-Yuan Lee , Mou-Shiung Lin , Ching-Cheng Huang
- 申请人: Jin-Yuan Lee , Mou-Shiung Lin , Ching-Cheng Huang
- 申请人地址: TW Hsinchu
- 专利权人: Megica Corporation
- 当前专利权人: Megica Corporation
- 当前专利权人地址: TW Hsinchu
- 代理机构: Seyfarth Shaw LLP
- 优先权: TW90133092A 20011231
- 主分类号: H01L21/44
- IPC分类号: H01L21/44
摘要:
An integrated chip package structure and method of manufacturing the same is by adhering dies on a ceramic substrate and forming a thin-film circuit layer on top of the dies and the ceramic substrate. Wherein the thin-film circuit layer has an external circuitry, which is electrically connected to the metal pads of the dies, that extends to a region outside the active surface of the dies for fanning out the metal pads of the dies. Furthermore, a plurality of active devices and an internal circuitry is located on the active surface of the dies. Signal for the active devices are transmitted through the internal circuitry to the external circuitry and from the external circuitry through the internal circuitry back to other active devices. Moreover, the chip package structure allows multiple dies with different functions to be packaged into an integrated package and electrically connecting the dies by the external circuitry.
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