发明授权
US08539399B1 Method and apparatus for providing user-defined interfaces for a configurable processor
有权
用于为可配置处理器提供用户定义的接口的方法和装置
- 专利标题: Method and apparatus for providing user-defined interfaces for a configurable processor
- 专利标题(中): 用于为可配置处理器提供用户定义的接口的方法和装置
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申请号: US11829063申请日: 2007-07-26
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公开(公告)号: US08539399B1公开(公告)日: 2013-09-17
- 发明人: Nupur B. Andrews , James Kim , Himanshu A. Sanghavi , William A. Huffman , Eileen Margaret Peters Long
- 申请人: Nupur B. Andrews , James Kim , Himanshu A. Sanghavi , William A. Huffman , Eileen Margaret Peters Long
- 申请人地址: US CA San Jose
- 专利权人: Cadence Design Systems, Inc.
- 当前专利权人: Cadence Design Systems, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Sawyer Law Group, P.C.
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
A technique that improves both processor performance and associated data bandwidth through user-defined interfaces that can be added to a configurable and extensible microprocessor core. These interfaces can be used to communicate status or control information and to achieve synchronization between the processor and any external device including other processors. These interfaces can also be used to achieve data transfer at the rate of one data element per interface in every clock cycle. This technique makes it possible to design multiprocessor SOC systems with high-speed data transfer between processors without using the memory subsystem. Such a system and design methodology offers a complete shift from the standard bus-based architecture and allows designers to treat processors more like true computational units, so that designers can more effectively utilize programmable solutions rather than design dedicated hardware. This can have dramatic effects not only in the performance and bandwidth achieved by designs, but also in the time to market and reuse of such designs.