Invention Grant
- Patent Title: Method of manufacturing dummy gates in gate last process
- Patent Title (中): 门最后工序中制造虚拟门的方法
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Application No.: US13510730Application Date: 2011-11-30
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Publication No.: US08541296B2Publication Date: 2013-09-24
- Inventor: Tao Yang , Chao Zhao , Jiang Yan , Junfeng Li , Yihong Lu , Dapeng Chen
- Applicant: Tao Yang , Chao Zhao , Jiang Yan , Junfeng Li , Yihong Lu , Dapeng Chen
- Applicant Address: CN Beijing
- Assignee: The Institute Of Microelectronics Chinese Academy of Science
- Current Assignee: The Institute Of Microelectronics Chinese Academy of Science
- Current Assignee Address: CN Beijing
- Priority: CN201110257658 20110901
- International Application: PCT/CN2011/002001 WO 20111130
- International Announcement: WO2013/029210 WO 20130307
- Main IPC: H01L21/3205
- IPC: H01L21/3205
Abstract:
The present invention provides a method of manufacturing a dummy gate in a gate last process, which comprises the steps of forming a dummy gate material layer and a hard mask material layer sequentially on a substrate; etching the hard mask material layer to form a top-wide-bottom-narrow hard mask pattern; dry etching the dummy gate material layer using the hard mask pattern as a mask to form a top-wide-bottom-narrow dummy gate. According to the dummy gate manufacturing method of the present invention, instead of vertical dummy gates used conventionally, top-wide-bottom-narrow trapezoidal dummy gates are formed, and after removing the dummy gates, trapezoidal trenches can be formed. It facilitates the subsequent filling of the high-k or metal gate material and enlarges the window for the filling process; as a result, the device reliability will be improved.
Public/Granted literature
- US20130059435A1 Method of Manufacturing Dummy Gates in Gate Last Process Public/Granted day:2013-03-07
Information query
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