Invention Grant
US08546255B2 Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate
有权
在半导体衬底中形成通路的方法和具有半导体衬底的半导体器件
- Patent Title: Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate
- Patent Title (中): 在半导体衬底中形成通路的方法和具有半导体衬底的半导体器件
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Application No.: US12849692Application Date: 2010-08-03
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Publication No.: US08546255B2Publication Date: 2013-10-01
- Inventor: Meng-Jen Wang
- Applicant: Meng-Jen Wang
- Applicant Address: TW Kaohsuing
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsuing
- Agency: McCracken & Frank LLC
- Priority: TW96128415A 20070802
- Main IPC: H01L21/768
- IPC: H01L21/768

Abstract:
The present invention relates to a method for forming vias in a semiconductor substrate, including the following steps: (a) providing a semiconductor substrate having a first surface and a second surface; (b) forming a groove on the semiconductor substrate; (c) filling the groove with a conductive metal; (d) removing part of the semiconductor substrate which surrounds the conductive metal, wherein the conductive metal is maintained so as to form an accommodating space between the conductive metal and the semiconductor substrate; and (e) forming an insulating material in the accommodating space. In this way, thicker insulating material can be formed in the accommodating space, and the thickness of the insulating material in the accommodating space is even.
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