Invention Grant
- Patent Title: Clock-synchronized method for universal serial bus (USB)
- Patent Title (中): 通用串行总线(USB)的时钟同步方法
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Application No.: US12853636Application Date: 2010-08-10
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Publication No.: US08553753B2Publication Date: 2013-10-08
- Inventor: Jiun-cheng Hsieh , Ying-chen Lin
- Applicant: Jiun-cheng Hsieh , Ying-chen Lin
- Applicant Address: TW Taipei
- Assignee: Genesys Logic, Inc.
- Current Assignee: Genesys Logic, Inc.
- Current Assignee Address: TW Taipei
- Priority: TW99124137A 20100722
- Main IPC: H03H7/30
- IPC: H03H7/30 ; H03H7/40 ; H03K5/159

Abstract:
A clock-synchronized method for universal serial bus (USB) is described. The method includes the following steps of: (a) a transmitter sends a periodic signal to a host unit during a first time interval; (b) the host unit transmits a first equalization training sequence signal to a receiver during a second time interval to train the receiver and the transmitter continuously sends the periodic signal to the host unit; (c) a clock and data recovery device extracts the first equalization training sequence signal during the second time interval to generate a extracted clock signal and a data signal; and (d) the transmitter sends a second equalization training sequence signal to the host unit based on the extracted clock signal during the third time interval to train the host unit and the receiver and the transmitter commonly utilize the extracted clock signal as a reference clock.
Public/Granted literature
- US20120020404A1 CLOCK-SYNCHRONIZED METHOD FOR UNIVERSAL SERIAL BUS (USB) Public/Granted day:2012-01-26
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