Invention Grant
- Patent Title: Method for wafer level package and semiconductor device fabricated using the same
- Patent Title (中): 晶圆级封装方法及使用其制造的半导体器件
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Application No.: US13011286Application Date: 2011-01-21
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Publication No.: US08558371B2Publication Date: 2013-10-15
- Inventor: JiSun Hong , Taeje Cho , Un-Byoung Kang , Hyuekjae Lee , Youngbok Kim , Hyung-sun Jang
- Applicant: JiSun Hong , Taeje Cho , Un-Byoung Kang , Hyuekjae Lee , Youngbok Kim , Hyung-sun Jang
- Applicant Address: KR Gyeonggi-Do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2010-0025905 20100323
- Main IPC: H01L23/12
- IPC: H01L23/12
Abstract:
Provided is a wafer level packaging method and a semiconductor device fabricated using the same. In the method, a substrate comprising a plurality of chips is provided. An adhesive layer is formed on the substrate corresponding to boundaries of the plurality of chips. A cover plate covering an upper portion of the substrate and having at least one opening exposing the adhesive layer or the substrate at the boundaries among the plurality of chips is attached to the adhesive layer.
Public/Granted literature
- US20110233706A1 Method For Wafer Level Package and Semiconductor Device Fabricated Using The Same Public/Granted day:2011-09-29
Information query
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