Invention Grant
US08558654B2 Vialess integration for dual thin films—thin film resistor and heater
有权
双薄膜 - 薄膜电阻和加热器的Vialess集成
- Patent Title: Vialess integration for dual thin films—thin film resistor and heater
- Patent Title (中): 双薄膜 - 薄膜电阻和加热器的Vialess集成
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Application No.: US13340255Application Date: 2011-12-29
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Publication No.: US08558654B2Publication Date: 2013-10-15
- Inventor: Olivier Le Neel , Stefania Maria Serena Privitera , Pascale Dumont-Girard , MaurizoGabriele Castorina , Calvin Leung
- Applicant: Olivier Le Neel , Stefania Maria Serena Privitera , Pascale Dumont-Girard , MaurizoGabriele Castorina , Calvin Leung
- Applicant Address: FR Grenoble IT Agrate Brianza (MI) SG Singapore
- Assignee: STMicroelectronics (Grenoble 2) SAS,STMicroelectronics S.r.l.,STMicroelectronics Pte Ltd.
- Current Assignee: STMicroelectronics (Grenoble 2) SAS,STMicroelectronics S.r.l.,STMicroelectronics Pte Ltd.
- Current Assignee Address: FR Grenoble IT Agrate Brianza (MI) SG Singapore
- Agency: Wolf, Greenfield & Sacks, P.C.
- Main IPC: H01C7/10
- IPC: H01C7/10

Abstract:
A process is described for integrating two closely spaced thin films without deposition of the films through deep vias. The films may be integrated on a wafer and patterned to form a microscale heat-trimmable resistor. A thin-film heating element may be formed proximal to a thin-film resistive element, and heat generated by the thin-film heater can be used to permanently trim a resistance value of the thin-film resistive element. Deposition of the thin films over steep or abrupt topography is minimized by using a process in which the thin films are deposited in a sequence that falls between depositions of thick metal contacts to the thin films.
Public/Granted literature
- US20120112873A1 VIALESS INTEGRATION FOR DUAL THIN FILMS - THIN FILM RESISTOR AND HEATER Public/Granted day:2012-05-10
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