Design rules for circuit patterns of a semiconductor device are identified, and schematic layouts of the circuit patterns are generated according to the design rules. Lithography friendly layout (LFL) circuit patterns are generated from the schematic layouts. Target layout circuit patterns are generated from the LFL circuit patterns. Optical proximity effect correction (OPC) is performed on the target layout circuit patterns to generate OPC circuit patterns. A mask is fabricated from the OPC circuit patterns, and may be used fabricate a semiconductor device.