发明授权
- 专利标题: Variation compensation circuitry for memory interface
- 专利标题(中): 用于存储器接口的变差补偿电路
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申请号: US13249954申请日: 2011-09-30
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公开(公告)号: US08565034B1公开(公告)日: 2013-10-22
- 发明人: Sean Shau-Tu Lu , Joseph Huang , Yan Chong , Pradeep Nagarajan , Chiakang Sung
- 申请人: Sean Shau-Tu Lu , Joseph Huang , Yan Chong , Pradeep Nagarajan , Chiakang Sung
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Treyz Law Group
- 代理商 Jason Tsai
- 主分类号: G11C7/00
- IPC分类号: G11C7/00 ; G11C7/22
摘要:
Integrated circuits may include memory interface circuitry operable to communicate with system memory. The memory interface circuitry may receive data and data strobe signals from system memory during read operations. The memory interface circuitry may include de-skew circuitry and dynamic variation compensation circuitry. The de-skew circuitry may be configured during calibration procedures to reduce skew between the data and data strobe signals. The dynamic variation compensation circuitry may be used in real time to compensate for variations in operating conditions. The dynamic variation compensation circuitry may include a phase generation circuit operable to generate data strobe signals having different phases, an edge detection circuit operable to detect leading/trailing edge failures, a control circuit operable to control a counter, and an adjustable delay circuit that is controlled by the counter and that is operable to properly position the data signal with respect to its corresponding data strobe signal.