Invention Grant
US08569801B2 Three-dimensional CMOS circuit on two offset substrates and method for making same
有权
两个偏移基板上的三维CMOS电路及其制造方法
- Patent Title: Three-dimensional CMOS circuit on two offset substrates and method for making same
- Patent Title (中): 两个偏移基板上的三维CMOS电路及其制造方法
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Application No.: US13059483Application Date: 2009-08-10
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Publication No.: US08569801B2Publication Date: 2013-10-29
- Inventor: Benjamin Vincent
- Applicant: Benjamin Vincent
- Applicant Address: FR Paris
- Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
- Current Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
- Current Assignee Address: FR Paris
- Agency: Oliff & Berridge, PLC
- Priority: FR0804689 20080826
- International Application: PCT/EP2009/005795 WO 20090810
- International Announcement: WO2010/022856 WO 20100304
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/336

Abstract:
A three-dimensional CMOS circuit having at least a first N-conductivity field-effect transistor and a second P-conductivity field-effect transistor respectively formed on first and second crystalline substrates. The first field-effect transistor is oriented, in the first substrate, with a first secondary crystallographic orientation. The second field-effect transistor is oriented, in the second substrate, with a second secondary crystallographic orientation. The orientations of the first and second transistors form a different angle from the angle formed, in one of the substrates, by the first and second secondary crystallographic directions. The first and second substrates are assembled vertically.
Public/Granted literature
- US20110140178A1 THREE-DIMENSIONAL CMOS CIRCUIT ON TWO OFFSET SUBSTRATES AND METHOD FOR MAKING SAME Public/Granted day:2011-06-16
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