Invention Grant
- Patent Title: MOS devices having elevated source/drain regions
- Patent Title (中): 具有升高的源极/漏极区域的MOS器件
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Application No.: US11800615Application Date: 2007-05-07
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Publication No.: US08569837B2Publication Date: 2013-10-29
- Inventor: Chih-Hsin Ko , Hung-Wei Chen , Chung-Hu Ke , Ta-Ming Kuan , Wen-Chin Lee
- Applicant: Chih-Hsin Ko , Hung-Wei Chen , Chung-Hu Ke , Ta-Ming Kuan , Wen-Chin Lee
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/417
- IPC: H01L29/417 ; H01L27/092 ; H01L29/78

Abstract:
A semiconductor structure includes a semiconductor substrate; a gate dielectric over the semiconductor substrate; a gate electrode over the gate dielectric; a deep source/drain region adjacent the gate electrode; a silicide region over the deep source/drain region; and an elevated metallized source/drain region between the silicide region and the gate electrode. The elevated metallized source/drain region adjoins the silicide region.
Public/Granted literature
- US20080277735A1 MOS devices having elevated source/drain regions Public/Granted day:2008-11-13
Information query
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