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US08570806B2 Z-direction decoding for three dimensional memory array 有权
用于三维存储器阵列的Z方向解码

Z-direction decoding for three dimensional memory array
摘要:
The switch transistors in the NAND strings have combinations of threshold voltage levels that vary across the levels of a three dimensional memory array. A bias arrangement is applied to the select lines electrically coupled to the switch transistors. The NAND strings on a particular level of a three dimensional memory array are selected. The NAND strings on other levels are deselected.
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