Invention Grant
- Patent Title: Metal interconnection structure and method for forming metal interlayer via and metal interconnection line
- Patent Title (中): 金属互连结构及形成金属夹层通孔和金属互连线的方法
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Application No.: US13143507Application Date: 2011-02-17
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Publication No.: US08575019B2Publication Date: 2013-11-05
- Inventor: Chao Zhao
- Applicant: Chao Zhao
- Applicant Address: CN Beijing
- Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee Address: CN Beijing
- Agency: Kinney & Lange, P.A.
- Priority: CN201010501703 20100930
- International Application: PCT/CN2011/071053 WO 20110217
- International Announcement: WO2012/041033 WO 20120405
- Main IPC: H01L23/535
- IPC: H01L23/535

Abstract:
There is provided a method for forming a metal interlayer via, comprising: forming a seed layer on a first dielectric layer and a first metal layer embedded in the first dielectric layer; forming a mask pattern on the seed layer to expose a portion of the seed layer covering some of the first metal layer; growing a second metal layer on the exposed portion of the seed layer; removing the mask pattern and a portion of the seed layer carrying the mask pattern to expose side walls of the second metal layer, a portion of the first metal layer and the first dielectric layer; forming an insulating barrier layer on the side walls, the portion of the first metal layer and the first dielectric layer. There is also provided a method for forming a metal interconnection line. Both of them can suppress the occurrence of voids. There is further provided a metal interconnection structure comprising a contact plug, a via and a metal interconnection line, wherein the via is formed on the metal interconnection line, the metal gate and/or the contact plug.
Public/Granted literature
Information query
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