- 专利标题： Charge breakdown avoidance for MIM elements in SOI base technology and method
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申请号： US13116416申请日： 2011-05-26
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公开(公告)号： US08575668B2公开(公告)日： 2013-11-05
- 发明人: William F. Clark, Jr. , Stephen E. Luce
- 申请人： William F. Clark, Jr. , Stephen E. Luce
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Roberts Mlotkowski Safran & Cole, P.C.
- 代理商 Anthony Canale
- 主分类号： H01L27/108
- IPC分类号： H01L27/108 ; H01L29/94
摘要：
A semiconductor device including at least one capacitor formed in wiring levels on a silicon-on-insulator (SOI) substrate, wherein the at least one capacitor is coupled to an active layer of the SOI substrate. A method of fabricating a semiconductor structure includes forming an SOI substrate, forming a BOX layer over the SOI substrate, and forming at least one capacitor in wiring levels on the BOX layer, wherein the at least one capacitor is coupled to an active layer of the SOI substrate.
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