A display controller is provided. The display controller includes an external memory and a timing controller which compresses current frame data to generate front first in-first out (FIFO) input data, temporarily stores the front FIFO input data and writes the front FIFO input data to the external memory in a burst mode, and reads data from the external memory in the burst mode, temporarily stores the read data as back FIFO output data, and decodes the back FIFO output data to output previous frame data.