发明授权
US08587985B2 Memory array with graded resistance lines 有权
具有分级电阻线的存储阵列

Memory array with graded resistance lines
摘要:
A memory array with graded resistance lines includes a first set of lines intersecting a second set of lines. A line from one of the sets of lines includes a graded resistance along a length of the line.
公开/授权文献
信息查询
0/0