发明授权
US08589767B2 Systems, devices and methods using redundant error correction code bit storage 有权
使用冗余纠错码位存储的系统,设备和方法

Systems, devices and methods using redundant error correction code bit storage
摘要:
A device, e.g., a semiconductor memory device, includes a plurality of memory cells, each configured to store at least one data bit and a plurality of error correction code (ECC) cells configured to redundantly store ECC bits for the memory cells. According to some embodiments, the plurality of ECC cells includes a plurality of pairs of ECC cells configured to store an ECC bit and a complement thereof. According to further embodiments, the plurality of ECC cells includes a plurality of groups of at least three ECC cells configured to store identical copies of an ECC bit.
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