发明授权
- 专利标题: Processor system optimization supporting apparatus and supporting method
- 专利标题(中): 处理器系统优化配套设备及配套方法
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申请号: US12549708申请日: 2009-08-28
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公开(公告)号: US08612805B2公开(公告)日: 2013-12-17
- 发明人: Masaomi Teranishi
- 申请人: Masaomi Teranishi
- 申请人地址: US CA Sunnyvale
- 专利权人: Spansion LLC
- 当前专利权人: Spansion LLC
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Sterne Kessler Goldstein & Fox PLLC
- 主分类号: G06F11/00
- IPC分类号: G06F11/00
摘要:
In order to enable the optimization of a processor system without relying upon knowhow or manual labor, an apparatus includes: information obtainment unit for reading, from memory, trace information of the processor system and performance information corresponding to the trace information; information analysis unit for analyzing the trace information and the performance information so as to obtain a performance factor such as an idle time, a processing completion time of a task, or the number of interprocessor communications as a result of the analysis; and optimization method output unit for displaying and outputting a method of optimizing the system in response to a result of the analysis.
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