发明授权
US08615727B2 Simultaneous multi-corner static timing analysis using samples-based static timing infrastructure 有权
使用基于样本的静态时序基础设施的同时多角静态时序分析

Simultaneous multi-corner static timing analysis using samples-based static timing infrastructure
摘要:
A method of performing simultaneous multi-corner static timing analysis (STA) on a design for an integrated circuit is provided. This method can include reading design data including a netlist, parasitics, and libraries at a plurality of corners. Each corner can represent a set of process, temperature, and voltage conditions. Using the design data as inputs, a plurality of operations can be performed to generate timing reports regarding the design at the plurality of corners. Notably, each operation has a single control flow and uses vectors of samples for performing the plurality of operations. Each sample is a value associated with a corner. This method minimizes computational resource and memory usage as well as accelerates the turn around time of multi-corner analysis.
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