发明授权
US08619975B2 Cipher processing apparatus 有权
密码处理装置

Cipher processing apparatus
摘要:
A cipher processing apparatus for arithmetic operations of an FO function and an FL function comprising: an FL function operating unit for generating a 2N-bit output based on a first extension key; a partial function operating unit for generating an N-bit output based on second and third extension keys; an N-bit intermediate register for storing an output of the partial operating unit; a 2N-bit first data register for storing data based on the output of the FL function operating unit; and a controller for making the partial function operating unit perform six cycles, inputting an output of the intermediate register to the FL function operating unit, and storing the data based on the output of the FL function operating unit in the first data register, in a first case in which the FL function uses a result of an arithmetic operation of the FO function.
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