- 专利标题: Memory model for hardware attributes within a transactional memory system
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申请号: US12346539申请日: 2008-12-30
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公开(公告)号: US08627014B2公开(公告)日: 2014-01-07
- 发明人: Gad Sheaffer , Shlomo Raikin , Vadim Bassin , Ehud Cohen , Oleg Margulis
- 申请人: Gad Sheaffer , Shlomo Raikin , Vadim Bassin , Ehud Cohen , Oleg Margulis
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
A method and apparatus for providing a memory model for hardware attributes to support transactional execution is herein described. Upon encountering a load of a hardware attribute, such as a test monitor operation to load a read monitor, write monitor, or buffering attribute, a fault is issued in response to a loss field indicating the hardware attribute has been lost. Furthermore, dependency actions, such as blocking and forwarding, are provided for the attribute access operations based on address dependency and access type dependency. As a result, different scenarios for attribute loss and testing thereof are allowed and restricted in a memory model.