Invention Grant
US08631365B2 Memory building blocks and memory design using automatic design tools
有权
使用自动设计工具的内存构建块和内存设计
- Patent Title: Memory building blocks and memory design using automatic design tools
- Patent Title (中): 使用自动设计工具的内存构建块和内存设计
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Application No.: US13461571Application Date: 2012-05-01
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Publication No.: US08631365B2Publication Date: 2014-01-14
- Inventor: Subramani Kengeri , Chung-Cheng Chou , Bharath Upputuri , Hank Cheng , Ming-Zhang Kuo , Pey-Huey Chen
- Applicant: Subramani Kengeri , Chung-Cheng Chou , Bharath Upputuri , Hank Cheng , Ming-Zhang Kuo , Pey-Huey Chen
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW
- Agency: Lowe Hauptman & Ham, LLP
- Main IPC: G06F9/45
- IPC: G06F9/45
Abstract:
The memory building blocks can be used in conjunction with ASIC automatic design tools to generate a memory macro (e.g., a memory array) using a known ASIC design flow including, for example, register transfer level (RTL), synthesis, automatic place and route (APR) and timing analysis.
Public/Granted literature
- US20120213013A1 MEMORY BUILDING BLOCKS AND MEMORY DESIGN USING AUTOMATIC DESIGN TOOLS Public/Granted day:2012-08-23
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