Invention Grant
US08637989B2 Semiconductor chip having via electrodes and stacked semiconductor chips interconnected by the via electrodes
有权
半导体芯片具有通孔电极和堆叠的半导体芯片，由通孔电极互连
- Patent Title: Semiconductor chip having via electrodes and stacked semiconductor chips interconnected by the via electrodes
- Patent Title (中): 半导体芯片具有通孔电极和堆叠的半导体芯片，由通孔电极互连
-
Application No.: US13569653Application Date: 2012-08-08
-
Publication No.: US08637989B2Publication Date: 2014-01-28
- Inventor: Ho-jin Lee , Hyun-soo Chung , Chang-seong Jeon , Sang-sick Park , Jae-hyun Phee
- Applicant: Ho-jin Lee , Hyun-soo Chung , Chang-seong Jeon , Sang-sick Park , Jae-hyun Phee
- Applicant Address: KR Suwon-Si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-Si
- Agency: F. Chau & Associates, LLC
- Priority: KR10-2008-0104986 20081024
- Main IPC: H01L23/48
- IPC: H01L23/48
Abstract:
A semiconductor device includes a semiconductor substrate and a via electrode. The via electrode has a first portion on the substrate and extends towards the substrate and has a plurality of spikes that extends from the first portion into the substrate, each of the spikes being spaced apart form one another.
Public/Granted literature
Information query
IPC分类:
