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US08638006B2 Semiconductor apparatus and method of trimming voltage 有权
半导体装置及修整电压的方法

  • 专利标题: Semiconductor apparatus and method of trimming voltage
  • 专利标题(中): 半导体装置及修整电压的方法
  • 申请号: US12966706
    申请日: 2010-12-13
  • 公开(公告)号: US08638006B2
    公开(公告)日: 2014-01-28
  • 发明人: Jae Hyuk Im
  • 申请人: Jae Hyuk Im
  • 申请人地址: KR Gyeonggi-do
  • 专利权人: SK Hynix Inc.
  • 当前专利权人: SK Hynix Inc.
  • 当前专利权人地址: KR Gyeonggi-do
  • 代理机构: William Park & Associates Patent Ltd
  • 优先权: KR10-2010-0106804 20101029
  • 主分类号: H02J1/10
  • IPC分类号: H02J1/10
Semiconductor apparatus and method of trimming voltage
摘要:
A semiconductor apparatus includes: a master chip and at least one slave chip configured to be stacked one on top of another; and a through-silicon via (TSV) configured to penetrate and electrically couple the master chip and the at least one slave chip, wherein the at least one slave chip receives a reference voltage generated from the master chip via the TSV and independently trims the reference voltage and then generates an internal voltage with the trimmed reference voltage.
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