Invention Grant
US08643153B2 Semiconductor device with staggered leads 有权
具有交错引线的半导体器件

Semiconductor device with staggered leads
Abstract:
A process for assembling a semiconductor device includes providing a lead frame having a native plane and a plurality of leads having a native lead pitch. The process includes trimming and forming a first subset of the plurality of leads to provide a first row of leads. The process includes trimming and forming a second subset of the plurality of leads to provide a second row of leads. At least one subset of leads is formed with an obtuse angle relative to the native plane such that lead pitch associated with the first or second subset of leads is greater than the native lead pitch.
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