Invention Grant
- Patent Title: Transistor array for testing
- Patent Title (中): 用于测试的晶体管阵列
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Application No.: US13245504Application Date: 2011-09-26
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Publication No.: US08643397B2Publication Date: 2014-02-04
- Inventor: Hsin-Ming Hou , Ji-Fu Kung
- Applicant: Hsin-Ming Hou , Ji-Fu Kung
- Applicant Address: TW Hsinchu
- Assignee: Untied Microelectronics Corp.
- Current Assignee: Untied Microelectronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
A transistor array for testing is provided. The transistor array includes a plurality of tested units. Each of the tested unit includes a tested transistor and a first to third switches. The tested transistor has a control terminal, a first and a second terminals and a bulk. The first switch is coupled between the first terminal and a leakage transporting line. The second switch is coupled between the second terminal and the leakage transporting line. The third switch is coupled between the control terminal and a bias providing line. The first to third switches are turned on or turned off according to a control signal. When the tested transistor is selected to be tested, the first to third switches are turned on according to the control signal.
Public/Granted literature
- US20130076388A1 TRANSISTOR ARRAY FOR TESTING Public/Granted day:2013-03-28
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