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US08645787B2 Method for controlling a basic parity node of a non-binary LDPC code decoder, and corresponding basic parity node processor 有权
用于控制非二进制LDPC码解码器的基本奇偶校验节点的方法，以及对应的基本奇偶校验节点处理器

Method for controlling a basic parity node of a non-binary LDPC code decoder, and corresponding basic parity node processor
摘要：
A method for controlling an elementary parity node of a decoder for decoding non-binary LDPC codes or a code decoder using at least one non-binary parity constraint, and to the corresponding elementary parity node. The elementary parity node receives first and second input lists (U1, U2) having nm elements sorted in ascending or descending order, nm being greater than 1, and gives an output list (Uout) of nm′ elements sorted in said ascending or descending order, nm′ being greater than 1, each element of the output list (Uout) being the result of a computing operation φ between an element of the first input list (U1) and an element of the second input list (U2). A limited number of candidates is selected for each element of the output list to be generated so as to reduce the number of operations to be carried out in the elementary parity node.
摘要（中）：

一种用于控制解码器的基本奇偶校验节点的方法，用于使用至少一个非二进制奇偶校验约束来解码非二进制LDPC码或码解码器，以及相应的基本奇偶校验节点。 基本奇偶校验节点接收具有按升序或降序排列的nm个元素的第一和第二输入列表（U1，U2），其中nm大于1，并且给出以所述升序或降序排列的nm'元素的输出列表（Uout） ，nm'大于1，输出列表（Uout）的每个元素是第一输入列表（U1）的元素和第二输入列表（U2）的元素之间的计算操作phi的结果。 选择要生成的输出列表的每个元素的有限数量的候选，以便减少要在基本奇偶校验节点中执行的操作的数量。

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