Invention Grant
US08649755B2 Timing circuit calibration in devices with selectable power modes 有权
具有可选功率模式的器件中的定时电路校准

Timing circuit calibration in devices with selectable power modes
Abstract:
Techniques are provided which may be implemented in various methods, apparatuses, and/or articles of manufacture for use by a device that is operable in a plurality of modes, including “higher power mode” and a “lower power mode”. A timing circuit may be set based, at least in part, on a phase value obtained from a signal from a ground-based transmitter, and operation of the device may be selectively transitioned to a lower power mode wherein the device uses the timing circuit. In certain example implementations, operation of the device to the lower power mode may be selectively transition and based, at least in part, on a determination that one or more attribute values satisfy a profile test indicating that the electronic device is likely to be within a characterized environment, and/or a determination that the electronic device is likely to be in a constrained motion state.
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