Invention Grant
US08659972B2 Adaptive read wordline voltage boosting apparatus and method for multi-port SRAM
有权
用于多端口SRAM的自适应读取字线升压装置和方法
- Patent Title: Adaptive read wordline voltage boosting apparatus and method for multi-port SRAM
- Patent Title (中): 用于多端口SRAM的自适应读取字线升压装置和方法
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Application No.: US13543916Application Date: 2012-07-09
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Publication No.: US08659972B2Publication Date: 2014-02-25
- Inventor: Michael ThaiThanh Phan , Manish Garg , David Paul Hoff , Quan Nguyen
- Applicant: Michael ThaiThanh Phan , Manish Garg , David Paul Hoff , Quan Nguyen
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Nicholas J. Pauley; Peter Michael Kamarchik; Joseph Agusta
- Main IPC: G11C5/14
- IPC: G11C5/14

Abstract:
Embodiments of the invention are directed to systems and methods for adaptively boosting the supply voltage to an SRAM (Static Random Access Memory) in response to process-voltage-temperature variations when needed. Embodiments include a critical path that simulates a typical memory cell and read-out circuit in the SRAM. Applying a trigger signal to a word-line input port of the critical path, and comparing the output of the critical path to a reference-latch signal, provides an indication of when to boost the supply voltage to the read-out circuits of the SRAM.
Public/Granted literature
- US20130064031A1 Adaptive Read Wordline Voltage Boosting Apparatus and Method for Multi-Port SRAM Public/Granted day:2013-03-14
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