Invention Grant
US08671329B2 Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes
有权
低开销和时序改进的架构,用于对片上系统以及其他电路,系统和过程中的存储器和总线执行错误检查和校正
- Patent Title: Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes
- Patent Title (中): 低开销和时序改进的架构,用于对片上系统以及其他电路,系统和过程中的存储器和总线执行错误检查和校正
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Application No.: US13860773Application Date: 2013-04-11
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Publication No.: US08671329B2Publication Date: 2014-03-11
- Inventor: Sanjay Kumar , Amit Kumar Dutta , Rubin A. Parekhji , Srivaths Ravi
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Wade J. Brady, III; Frederick J. Telecky, Jr.
- Priority: IN667/CHE/2010 20100312
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
An electronic circuit (200) for use with an accessing circuit (110) that supplies a given address and a partial write data portion and also has dummy cycles. The electronic circuit (200) includes a memory circuit (230) accessible at addresses, an address buffer (410), a data buffer (440) coupled to the memory circuit (230), and a control circuit (246) operable in the dummy cycles to read data from the memory circuit (230) to the data buffer (440) from a next address location in the memory circuit (230) and to store that next address in the address buffer (410). The electronic circuit further includes a multiplexer (430), a comparing circuit (420) responsive to the given address and a stored address in the address buffer (410), to operate the multiplexer (430) to pass data from the data buffer (440) or to pass data from the memory circuit (230) instead; and a mixer circuit (450) operable to put the partial write data portion into the data taken from the selected one of the data buffer (440) or memory circuit (230). Other circuits, devices, systems, processes of operation and processes of manufacture are also disclosed.
Public/Granted literature
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