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US08673726B2 Transistor structure with a sidewall-defined intrinsic base to extrinsic base link-up region and method of forming the transistor 有权
具有侧壁定义的本征基极到外部基极连接区域的晶体管结构和形成晶体管的方法

Transistor structure with a sidewall-defined intrinsic base to extrinsic base link-up region and method of forming the transistor
Abstract:
Disclosed are embodiments of a bipolar or heterojunction bipolar transistor and a method of forming the transistor. The transistor can incorporate a dielectric layer sandwiched between an intrinsic base layer and a raised extrinsic base layer to reduce collector-base capacitance Ccb, a sidewall-defined conductive strap for an intrinsic base layer to extrinsic base layer link-up region to reduce base resistance Rb and a dielectric spacer between the extrinsic base layer and an emitter layer to reduce base-emitter Cbe capacitance. The method allows for self-aligning of the emitter to base regions and incorporates the use of a sacrificial dielectric layer, which must be thick enough to withstand etch and cleaning processes and still remain intact to function as an etch stop layer when the conductive strap is subsequently formed. A chemically enhanced high pressure, low temperature oxidation (HIPOX) process can be used to form such a sacrificial dielectric layer.
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