Invention Grant
- Patent Title: Method for forming a via in a substrate
- Patent Title (中): 在基板上形成通孔的方法
-
Application No.: US13051501Application Date: 2011-03-18
-
Publication No.: US08673774B2Publication Date: 2014-03-18
- Inventor: Meng-Jen Wang
- Applicant: Meng-Jen Wang
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: McCracken & Frank LLC
- Priority: TW96146101A 20071204
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
The present invention relates to a method for forming a via in a substrate. The method includes the following steps: (a) providing a substrate; (b) forming a groove that has a side wall and a bottom wall on a first surface of the substrate; (c) forming a first conductive metal on the side wall and the bottom wall of the groove so as to form a central groove; (d) forming a center insulating material in the central groove; (e) forming an annular groove that surrounds the first conductive metal on the first surface of the substrate; (f) forming a first insulating material in the annular groove; and (g) removing part of the substrate to expose the first conductive metal, the center insulating material and the first insulating material.
Public/Granted literature
- US20110171829A1 Method for Forming a Via in a Substrate and Substrate with a Via Public/Granted day:2011-07-14
Information query
IPC分类: