A pixel structure includes a substrate, a gate line and a gate electrode disposed on the substrate, an insulating layer covering the substrate, a semiconductor layer disposed on the insulating layer, a data line, a source electrode, and a drain electrode which are disposed on the insulating layer and the semiconductor layer, a planarization layer disposed on the data line, the source electrode, and the drain electrode, and a pixel electrode disposed on the planarization layer. The planarization layer has a through hole exposing the drain electrode. The pixel electrode is electrically connected to the drain electrode via the through hole and includes an opaque main electrode and a plurality of transparent branch electrodes disposed on the planarization layer. One end of each transparent branch electrode is electrically connected to the opaque main electrode.