发明授权
US08674866B2 Interleaved return-to-zero, high performance digital-to-analog converter 有权
交错归零,高性能数模转换器

Interleaved return-to-zero, high performance digital-to-analog converter
摘要:
In one method embodiment, receiving a data signal; and converting the data signal to an analog signal over plural clock cycles, the converting comprising: during a first clock cycle of the plural clock cycles, switching on one or more first current cells of a first bank while simultaneously a second bank comprising second current cells is switched off or almost off; and during a second clock cycle of the plural clock cycles, the second clock cycle immediately subsequent to the first clock cycle, switching on one or more of the second current cells of the second bank while simultaneously the first bank is switched off or almost off.
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