Invention Grant
- Patent Title: Hierarchical common source line structure in NAND flash memory
- Patent Title (中): NAND闪存中的分层公共源线结构
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Application No.: US13481888Application Date: 2012-05-28
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Publication No.: US08675410B2Publication Date: 2014-03-18
- Inventor: Hong-Beom Pyeon , Jin-Ki Kim
- Applicant: Hong-Beom Pyeon , Jin-Ki Kim
- Applicant Address: CA Ottawa
- Assignee: MOSAID Technologies Incorporated
- Current Assignee: MOSAID Technologies Incorporated
- Current Assignee Address: CA Ottawa
- Agency: Ridout & Maybee LLP
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
Each memory cell string in a generic NAND flash cell block connects to a Common Source Line (CLS). A value for applying to the CSL is centrally generated and distributed to a local switch logic unit corresponding to each NAND flash cell block. For source-line page programming, the distribution line may be called a Global Common Source Line (GCSL). In an array of NAND flash cell blocks, only one NAND flash cell block is selected at a time for programming. To reduce power consumption, only the selected NAND flash cell block receives a value on the CSL that is indicative of the value on the GCSL. Additionally, the CSLs of non-selected NAND flash cell blocks may be disabled through an active connection to ground.
Public/Granted literature
- US20120236647A1 HIERARCHICAL COMMON SOURCE LINE STRUCTURE IN NAND FLASH MEMORY Public/Granted day:2012-09-20
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