Invention Grant
US08675410B2 Hierarchical common source line structure in NAND flash memory 有权
NAND闪存中的分层公共源线结构

Hierarchical common source line structure in NAND flash memory
Abstract:
Each memory cell string in a generic NAND flash cell block connects to a Common Source Line (CLS). A value for applying to the CSL is centrally generated and distributed to a local switch logic unit corresponding to each NAND flash cell block. For source-line page programming, the distribution line may be called a Global Common Source Line (GCSL). In an array of NAND flash cell blocks, only one NAND flash cell block is selected at a time for programming. To reduce power consumption, only the selected NAND flash cell block receives a value on the CSL that is indicative of the value on the GCSL. Additionally, the CSLs of non-selected NAND flash cell blocks may be disabled through an active connection to ground.
Public/Granted literature
Information query
Patent Agency Ranking
0/0