Invention Grant
US08675429B1 Optimal channel design for memory devices for providing a high-speed memory interface
有权
用于提供高速存储器接口的存储器件的最佳通道设计
- Patent Title: Optimal channel design for memory devices for providing a high-speed memory interface
- Patent Title (中): 用于提供高速存储器接口的存储器件的最佳通道设计
-
Application No.: US13597895Application Date: 2012-08-29
-
Publication No.: US08675429B1Publication Date: 2014-03-18
- Inventor: Min Wang , Philip Arnold Ferolito , Suresh Natarajan Rajan , Michael John Sebastian Smith
- Applicant: Min Wang , Philip Arnold Ferolito , Suresh Natarajan Rajan , Michael John Sebastian Smith
- Applicant Address: US CA Mountain View
- Assignee: Google Inc.
- Current Assignee: Google Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fish & Richardson P.C.
- Main IPC: G11C7/00
- IPC: G11C7/00
Abstract:
A system is provided for high-speed communication between a memory controller and a plurality of memory devices. A memory controller, and a plurality of memory devices are provided. Additionally, at least one channel is included for providing electrical communication between the memory controller and the plurality of memory devices, an impedance of the channel being at least partially controlled using High Density Interconnect (HDI) technology.
Information query
