Invention Grant
US08675771B2 Log likelihood ratio arithmetic circuit, transmission apparatus, log likelihood ratio arithmetic method, and program 有权
对数似然比运算电路,传输装置,对数似然比算术方法和程序

  • Patent Title: Log likelihood ratio arithmetic circuit, transmission apparatus, log likelihood ratio arithmetic method, and program
  • Patent Title (中): 对数似然比运算电路,传输装置,对数似然比算术方法和程序
  • Application No.: US12083234
    Application Date: 2006-09-29
  • Publication No.: US08675771B2
    Publication Date: 2014-03-18
  • Inventor: Eisaku Sasaki
  • Applicant: Eisaku Sasaki
  • Applicant Address: JP Tokyo
  • Assignee: NEC Corporation
  • Current Assignee: NEC Corporation
  • Current Assignee Address: JP Tokyo
  • Agency: McGinn Intellectual Property Law Group, PLLC
  • Priority: JP2006-266523 20060929
  • International Application: PCT/JP2006/068925 WO 20060929
  • International Announcement: WO2008/038749 WO 20080403
  • Main IPC: H04L27/36
  • IPC: H04L27/36
Log likelihood ratio arithmetic circuit, transmission apparatus, log likelihood ratio arithmetic method, and program
Abstract:
A log likelihood ratio arithmetic circuit for calculating a log likelihood ratio from information of a coordinate of a reception signal point to be applied to a communication system using a quadrature amplitude modulation method, wherein the circuit limits a scope within which a value of the log likelihood ratio varies corresponding to a position of the reception signal point to a range between adjacent signal points including a hard-decision threshold of a bit, and wherein the value of the log likelihood ratio does not vary outside of the range between the adjacent signal points.
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