Invention Grant
- Patent Title: Fan-out chip scale package
- Patent Title (中): 扇出芯片级封装
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Application No.: US13916430Application Date: 2013-06-12
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Publication No.: US08679963B2Publication Date: 2014-03-25
- Inventor: Jan Gulpen , Tonny Kamphuis , Pieter Hochstenbach , Leo Van Gemert , Eric Van Grunsven , Marc De Samber
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/48
Abstract:
A chip scale package has a semiconductor die having an array of die bond pads arranged with a bond pad density per unit area, embedded in a molded die support body having a surface supporting an array of conducting contacts, each of the contacts connected by an electrical lead to a corresponding one of the die bond pads.
Public/Granted literature
- US20130273731A1 FAN-OUT CHIP SCALE PACKAGE Public/Granted day:2013-10-17
Information query
IPC分类:
