Invention Grant
US08689163B2 Semiconductor apparatus capable of error revision using pin extension technique and design method therefor
有权
能够使用引脚扩展技术进行错误修正的半导体装置及其设计方法
- Patent Title: Semiconductor apparatus capable of error revision using pin extension technique and design method therefor
- Patent Title (中): 能够使用引脚扩展技术进行错误修正的半导体装置及其设计方法
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Application No.: US12928021Application Date: 2010-12-01
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Publication No.: US08689163B2Publication Date: 2014-04-01
- Inventor: Dong-Yun Kim , Dong-Hoon Yeo , Hyun-Chul Shin , Kyung-Ho Kim , Byung-Tae Kang , Ju-Yong Shin , Sung-Chul Lee
- Applicant: Dong-Yun Kim , Dong-Hoon Yeo , Hyun-Chul Shin , Kyung-Ho Kim , Byung-Tae Kang , Ju-Yong Shin , Sung-Chul Lee
- Applicant Address: KR Suwon-si KR Seoul
- Assignee: Samsung Electronics Co., Ltd.,IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
- Current Assignee: Samsung Electronics Co., Ltd.,IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
- Current Assignee Address: KR Suwon-si KR Seoul
- Priority: KR10-2009-0122917 20091211
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A semiconductor apparatus and a design method for the semiconductor apparatus allow debugging or repairs by using a spare cell. The semiconductor apparatus includes a plurality of metal layers. At least one repair block performs a predetermined function. A spare block is capable of substituting for a function of the repair block. And at least one of the plurality of metal layers is predetermined to be a repair layer for error revision. At least one pin of the repair block is connected to the repair layer through a first pin extension, and at least one pin of the spare block is capable of extending to the repair layer. When the repair block is to be repaired, the pin extension of the repair layer and the repair block is disconnected, and at least one pin of the spare block is connected to the repair layer through a second pin extension.
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