Invention Grant
US08691648B1 Methods for fabricating semiconductor memory with process induced strain
有权
用工艺诱导应变制造半导体存储器的方法
- Patent Title: Methods for fabricating semiconductor memory with process induced strain
- Patent Title (中): 用工艺诱导应变制造半导体存储器的方法
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Application No.: US13168711Application Date: 2011-06-24
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Publication No.: US08691648B1Publication Date: 2014-04-08
- Inventor: Igor Polishchuk , Sagy Levy , Krishnaswamy Ramkumar , Jeong Soo Byun
- Applicant: Igor Polishchuk , Sagy Levy , Krishnaswamy Ramkumar , Jeong Soo Byun
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
Non-volatile semiconductor memories and methods of fabricating the same to improve performance thereof are provided. In one embodiment, the method includes: (i) forming a gate for a non-volatile memory transistor on a surface of a substrate overlaying a channel region formed therein, the gate including a charge trapping layer; and (ii) forming a strain inducing structure over the gate of the non-volatile memory transistor to increase charge retention of the charge trapping layer. Preferably, the memory transistor is a silicon-oxide-nitride-oxide-silicon (SONOS) transistor comprising a SONOS gate stack. More preferably, the memory also includes a logic transistor on the substrate, and the step of forming a strain inducing structure comprises the step of forming the strain inducing structure over the logic transistor. Other embodiments are also disclosed.
Information query
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